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반도체 EDS 검사 공정의 설비 용량 계획에 관한 최적화 모델
An Optimization Model for Capacity Planning of Electrical Die Sorting Process in Semiconductor Manufacturing
김해중 ( Hae Joong Kim ) , 임대은 ( Dae-eun Lim )
UCI I410-ECN-0102-2022-500-000570379

In this paper, a mixed-integer programming (MIP) based capacity planning model for the electrical die sorting (EDS) process where probe cards are used as consumables in semiconductor facilities is presented. The model is designed to satisfy the demand while maximizing the utilization of testers and probe cards in hand. As a result, the level of resource procurement can stay at the minimum level in which directly can be translated into positive profitability. This research employs the decomposition methodology to convert the MIP formulation into a “solver recognizable” format. By doing so, the decomposed model can provide near-optimal solutions instantaneously for practical application and the positive outcome is projected to be over several million dollars.

1. Introduction
2. Related Literature
3. Model Formulation
4. System implementation and Experiment
5. Result and Conclusion
References
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